Formal Verification of Real time Software

The veri cation of functionality of the input output logic properties often composes the majority of software requirements analysis Automated theorem provers ATPs such as SRI s Prototype Veri cation System PVS have been successfully used in the formal veri cation of functional properties However such functional methods are not readily applicable to the veri cation of the real time software re quirements The thesis continues the research summarized in focusing on extending func tional veri cation methods to the veri cation of real time control properties through the development of a PVS library for the speci cation and veri cation of real time control system More speci cally we extend the PVS Clocks and Held For theo ries originally de ned in and and re ne the PVS Real Time method PVS RT outlined in New developments of the thesis include the de nition of strong clock induction and several lemmas regarding real time properties These de nitions when combined with PVS s support for the tabular methods of Parnas et al provide a useful environment for the speci cation and veri cation of basic real time control properties To illustrate the utility of the PVS RT method we perform the veri cation of two timing blocks of an industrial real time control system The PVS speci cation and proof techniques are described in su cient details to show how errors or invalid assumptions are detected in the proposed implementation and the original speci cations Finally we prove that corrected versions of the implementation satisfy the updated versions of the speci cations